Self-checking content-addressable memory and method of operation

Details Self-checking content-addressable memory and method of operation Self-checking content-addressable memory and method of operation

1996-10-08

1998-08-18

Chung, Phung M.

Excavating

371 211, 371 492, 371 493, G06F 1110, H03M 1300

Patent

active

057967580

ABSTRACT:
A Content Addressable Memory (CAM) includes a plurality of conventional CAM cells arranged in rows and columns, the CAM cells being coupled together by word lines and bit lines for reading from and writing information into the CAM cells. Each CAM cell in a row is connected to a match line which provides an indication when an input word on the bit lines matches the contents of the cells coupled to the match line. A combinatorial logic circuit including a parity generator is coupled to the word lines and provides an indication when multiple words have been selected by an input word. The combinatorial logic circuit includes an OR circuit providing a first input to an AND circuit and a parity generator providing a second input to the AND which only provides an output when multiple word lines have been selected by an input word.

REFERENCES:
patent: 3789204 (1974-01-01), Barlow
patent: 4680760 (1987-07-01), Giles et al.
patent: 5319589 (1994-06-01), Yamagata et al.
patent: 5491703 (1996-02-01), Barnaby et al.

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