Self-calibration timing circuit

Details Self-calibration timing circuit Self-calibration timing circuit

1993-09-30

1995-08-01

Wambach, Margaret R.

Electrical pulse counters, pulse dividers, or shift registers: c

Applications

Measuring or testing

324 7662, 324 7664, 324 7682, 327 42, 327 40, H03D 302

Patent

active

054385997

ABSTRACT:
A method and apparatus for a "self-calibration timing circuit" is utilized to dynamically compensate for inherent performance differences between individual semiconductor dice, and for a wide range of different operating temperature and voltage parameters. The present invention accomplishes this by utilizing circuits which are deposed on the semiconductor die. These circuits consist of a relaxation oscillator running at the natural frequency of the silicon die, a gated counter counting the number of cycles of the relaxation oscillator frequency during a reference clock period to produce a ratio thereof, and a decision circuit that utilizes this ratio to optimize a system clock frequency for best system operation.

REFERENCES:
patent: 4616173 (1986-10-01), Cook et al.
patent: 4993052 (1991-02-01), Hammelsbacher

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