Coded data generation or conversion – Converter calibration or testing
Patent
1997-04-29
1999-07-27
Hoff, Marc S.
Coded data generation or conversion
Converter calibration or testing
341108, 341172, H03M 110
Patent
active
059297964
ABSTRACT:
A self-calibrating reversible pipeline analog to digital converting architecture configured to convert an input analog signal to an output digital signal and further to convert an input digital signal to an output analog signal is disclosed. The reversible pipeline architecture self-calibrates to compensate for adverse effects upon the linearity during signal conversion using a digital correction procedure. The same digital correction coefficients are used during both analog to digital conversion as well as during digital to analog conversion. The self-calibrating reversible converting architecture includes a reduced gain stage to create the necessary redundancy for the digital correction. Furthermore, the self-calibrating reversible converting architecture includes an overflow reduction stage to generate redundancy for the digital correction.
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Lewicki Laurence Douglas
Opris Ion E.
Stoian Lee
Hoff Marc S.
National Semiconductor Corporation
Oh Seong-Kun
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