Self-calibrating high speed D/A converter

Coded data generation or conversion – Converter compensation

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341120, 341145, H03M 106

Patent

active

056466196

ABSTRACT:
A self-calibrating high speed D/A converter is provided with a calibration circuit for providing a fixed calibration current and a fixed calibration voltage during calibration mode, and a biasing circuit for biasing the calibration circuit with a first reference voltage and biasing the MSB and LSB array cells with a second reference voltage. By keeping the biasing voltage constant at the array cells during both calibrating and operating modes, such as 12 bits, the D/A converter effectively operates at high resolution, and at high operating speed.

REFERENCES:
patent: 4935740 (1990-06-01), Schouwenhaars et al.
patent: 5021784 (1991-06-01), Groeneveld et al.
patent: 5446455 (1995-08-01), Brooks
Groeneveld et al., "A Self-Calibration Technique For Monolithic High-Resolution D/A Converters", IEEE Journal of Solid State Circuits, vol. 24, No. 6, Dec. 1989, pp. 1517-1522.
Im et al., "Bandwidth-Efficient Digital Transmission Up To 155 Mb/s Over Unshielded Twisted Pair Wiring", IEEE, 1993, pp. 1797-1803.
Amrany et al., "FA 14.2: A Programmable DSP Engine for High-Rate Modems", IEEE International Solid-State Circuits Conference, 1992, pp. 222-223.
Lewis et al., "A 10-b 20-Msample/s Analog-to-Digital Converter", IEEE Journal of Solid-State Circuits, vol. 27, No. 3, Mar. 1992, pp. 351-358.

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