Self-calibrating data conversion circuitry and method therefor

Coded data generation or conversion – Converter calibration or testing

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C341S155000, C341S163000

Reexamination Certificate

active

07868796

ABSTRACT:
A data converter for converting analog signals to digital signals, or for converting digital signals to analog signals is provided. In one embodiment, a production self-test is provided. In one embodiment, a high-speed lower-resolution method or mode for a data converter is provided. In one embodiment, a differential data converter with a more stable comparator common mode voltage is provided. In one embodiment, the input range of a digitally calibrated data converter is provided and maintained so that there is no loss in input range due to the calibration. In one embodiment, digital post-processing of an uncalibrated result using a previously stored calibration value is provided.

REFERENCES:
patent: 4222107 (1980-09-01), Mrozowski et al.
patent: 4272760 (1981-06-01), Prazak et al.
patent: 4348658 (1982-09-01), Carter
patent: 4399426 (1983-08-01), Tan
patent: 4451821 (1984-05-01), Domogalla
patent: 4599604 (1986-07-01), McKenzie et al.
patent: 4679028 (1987-07-01), Wilson et al.
patent: 4970514 (1990-11-01), Draxelmayr
patent: 5132685 (1992-07-01), DeWitt et al.
patent: 5361067 (1994-11-01), Pinckley
patent: 5594555 (1997-01-01), Ishida
patent: 5594612 (1997-01-01), Henrion
patent: 5687003 (1997-11-01), Nagano
patent: 5691720 (1997-11-01), Wang et al.
patent: 5764175 (1998-06-01), Pan
patent: 5818370 (1998-10-01), Sooch et al.
patent: 5977893 (1999-11-01), Chen et al.
patent: 6075478 (2000-06-01), Abe
patent: 6268813 (2001-07-01), de Wit
patent: 6340944 (2002-01-01), Chang et al.
patent: 6348885 (2002-02-01), Munoz et al.
patent: 6362762 (2002-03-01), Jensen et al.
patent: 6400302 (2002-06-01), Amazeen et al.
patent: 6404375 (2002-06-01), Munoz et al.
patent: 6417794 (2002-07-01), Munoz et al.
patent: 6424276 (2002-07-01), Munoz et al.
patent: 6433712 (2002-08-01), Ohnhaeuser et al.
patent: 6448911 (2002-09-01), Somayajula
patent: 6486806 (2002-11-01), Munoz et al.
patent: 6559789 (2003-05-01), Somayajula
patent: 6566857 (2003-05-01), Kakizawa et al.
patent: 6621431 (2003-09-01), Engl et al.
patent: 6791484 (2004-09-01), Lee et al.
patent: 6864820 (2005-03-01), Nakamura et al.
patent: 6882298 (2005-04-01), Leung et al.
patent: 6891487 (2005-05-01), Leung et al.
patent: 6924755 (2005-08-01), Callanan et al.
patent: 6940445 (2005-09-01), Kearney
patent: 6965332 (2005-11-01), Nakamura et al.
patent: 6975950 (2005-12-01), Bardsley
patent: 7158070 (2007-01-01), Yang et al.
patent: 7180439 (2007-02-01), Bakker
patent: 7271758 (2007-09-01), Piasecki et al.
patent: 7439898 (2008-10-01), Nittala et al.
patent: 7443323 (2008-10-01), Rotchford et al.
patent: 2007/0018939 (2007-01-01), Chen et al.
patent: 2009/0075610 (2009-03-01), Keehr et al.
patent: 2009/0201237 (2009-08-01), Nishimura
patent: 2009/0244014 (2009-10-01), Hotelling et al.
Gulati et al; “A Low-Power Reconfigurable Analog-to-Digital Converter” IEEE Journal of Solid-State Circuits, vol. 36, No. 12, Dec. 2001, pp. 1900-1911.
Hester et al; “Fully Differential ADC with Rail-to-Rail Common-Mode Range and Nonlinear Capacitor Compensation”; IEEE Journal of Solid-State Circuits, vol. 25, No. 1, Feb. 1990.
Notice of Allowance mailed Dec. 24, 2010 on Related Application 122420058.
Office Action mailed Dec. 2, 2009 on Related U.S. Appl. No. 12/242,077.
Office Action mailed Dec. 3, 2009 on Related U.S. Appl. No. 12/242,093.
Office Action mailed Jan. 11, 2010 on Related U.S. Appl. No. 12/242,112.
PCT/US2009/052822 International Search Report and Written Opinion mailed Mar. 2, 2010.
De Vries, R. et al.; “Built-In Self-Test Methodology for A/D Converters”; 1997 European Design and Test Conference; Mar. 17-20, 1997; pp. 353-358; IEEE.
Lee; “A Self-Calibrating 15 bit CMOS A/D Converter”; IEEE Journal of Solid-State Circuits; vol. SC-19, No. 6; Dec. 1984.
Neubauer; “A Successive Approximation A/D Converter with 16bit 200kS/s in 0.6pm CMOS using Self-Calibration and Low Power Techniques”; IEEE; 2001.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Self-calibrating data conversion circuitry and method therefor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Self-calibrating data conversion circuitry and method therefor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Self-calibrating data conversion circuitry and method therefor will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2731822

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.