Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Clock or pulse waveform generating
Reexamination Certificate
2002-07-30
2004-07-06
Nguyen, Linh M. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Clock or pulse waveform generating
C327S292000
Reexamination Certificate
active
06759885
ABSTRACT:
BACKGROUND OF INVENTION
1. Field of the Invention
The present invention relates to a clock generator, and more specifically, to a self-calibrating clock generator that can automatically measure the delay of an internal delay cell.
2. Description of the Prior Art
Clock generators are used in a wide range of electronic devices such as computers and communication equipment, which have specific timing requirements. Often times, delay cells are used to produce delayed versions of an original clock. Please refer to FIG.
1
.
FIG. 1
is a block diagram of a clock generator
10
according to the prior art. A clock signal CLK is fed into the clock generator
10
, which contains a plurality of delay cells
12
cascaded together in series. The clock signal CLK is fed from an external source, and has a reliable and consistent frequency. Each delay cell
12
has an input and an output, and can delay an inputted signal by a specific amount of time. Delayed clock signals, Delayed_CLK
1
to Delayed_CLKn, are generated from the series of delay cells
12
, with one delayed clock being taken from the output of each delayed cell.
By producing the series of delayed clocks, the clock generator
10
can produce different frequency clocks by using logic to combine the clock signal CLK with one of the delayed clock signals. For instance, suppose that Delayed_CLK
3
is delayed by exactly half of a period of clock signal CLK. A clock with twice the frequency of clock signal CLK can be generated by producing a new clock signal which is formed by using an AND gate to produce CLK AND Delayed_CLK
3
. Use of clock generators to perform this function is well known in the art, and for brevity, will not be further explained.
Unfortunately, delay cells
12
in the prior art clock generator
10
do not have a consistent delay time. Variations in manufacturing processes and variations in operating temperature can change the delay time that delay cells
12
provide. Designers of the clock generator
10
usually take the design of the delay cells
12
from a cell library that has common circuit modules already pre-built. Assuming worst-case variations in manufacturing processes and operating temperature, the actual delay time of the delay cells
12
can vary threefold. For example, it is possible for a minimum delay time of a delay cell
12
to be 0.61 ns and for the maximum delay time to be 1.84 ns. Clearly, this inconsistency in the delay time of delay cells
12
limits the ability of the clock generator
10
to generate accurate output clock signals.
SUMMARY OF INVENTION
It is therefore a primary objective of the claimed invention to provide a self-calibrating clock generator with a clock analyzer for generating process and temperature independent clock signals in order to solve the above-mentioned problems.
According to the claimed invention, a clock analyzer includes an input port for receiving a reference clock signal from an external source, a plurality of functionally identical delay cells for delaying the reference clock signal and generating a plurality of delayed clock signals, each delayed clock signal being delayed by a unique number of delay cells, and at least one comparator for comparing the reference clock signal to the plurality of delayed clock signals and choosing a selected clock signal from the plurality of delayed clock signals that at least partially overlaps the reference clock signal.
It is an advantage of the claimed invention that the clock analyzer is able to calculate the exact delay time of each delay cell. Using this delay time, the clock generator is able to accurately generate process and temperature independent clock signals.
These and other objectives of the claimed invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment, which is illustrated in the various figures and drawings.
REFERENCES:
patent: 5179438 (1993-01-01), Morimoto
patent: 6147527 (2000-11-01), Lee et al.
patent: 2002/0017939 (2002-02-01), Okuda et al.
Faraday Technology Corp.
Hsu Winston
Nguyen Linh M.
LandOfFree
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