Amplifiers – Hum or noise or distortion bucking introduced into signal...
Reexamination Certificate
2004-02-19
2004-12-14
Nguyen, Khanh Van (Department: 2817)
Amplifiers
Hum or noise or distortion bucking introduced into signal...
Reexamination Certificate
active
06831512
ABSTRACT:
FIELD OF THE INVENTION
This application generally pertains to, but is not limited to, linearizers used in power amplifiers, for example, RF power amplifiers used in wireless communication systems.
BACKGROUND OF THE INVENTION
RF power amplifiers, like most amplifiers, are substantially linear at small signal amplitudes. However, it is preferable to drive power amplifiers near saturation to deliver significant output power at a reasonable efficiency. As the operation of a power amplifier approaches saturation, it will become more nonlinear, and thus, exhibit more distortion in its output. Consequently, numerous “linearizer” circuits have been developed over the years in an attempt to remove the power amplifier's nonlinearity and thereby reduce the distortion in its output. Because the characteristics of the power amplifier may change over time and frequency, these linearizer circuits may be designed to adapt to present amplifier conditions. A generic power amplifier linearizer is shown in
FIG. 1
, and uses either predistortion circuitry, feedforward circuitry, or a combination of both, to correct for the power amplifier's nonlinearity. (The inclusion of this generic linearizer in this Background Section is not intended to imply that the circuit configuration shown therein, and variations thereof, are in the prior art.)
For example, a linearizer may use only a predistortion adjuster circuit p. As will be appreciated by those skilled in the art, in this linearizer the signal adjuster circuit s is merely a delay line ideally matching the total delay of the adjuster circuit p and the power amplifier. In this case, the distortion cancellation circuit, comprising the distortion adjuster circuit d, the error amplifier and the delay circuit, is not used—the output of the linearizer is the output of the signal power amplifier. The goal of the adjuster circuit p is to predistort the power amplifier input signal so that the power amplifier output signal is proportional to the input signal of the linearizer. That is, the predistorter acts as a filter having a transfer characteristic which is the inverse of that of the power amplifier, except for a complex constant (i.e., a constant gain and phase). Because of their serial configuration, the resultant transfer characteristic of the predistorter and the power amplifier is, ideally, a constant gain and phase that depends on neither frequency nor signal level. Consequently, the output signal will be the input signal amplified by the constant gain and out of phase by a constant amount, that is, linear. Therefore, to implement such predistortion linearizers, the transfer characteristic of the power amplifier is computed and a predistortion filter having the inverse of that transfer characteristic is constructed. Preferably, the predistortion filter should also compensate for changes in the transfer function of the power amplifier, such as those caused by degraded power amplifier components.
Other linearizers use feedforward circuitry to correct for the nonlinearity in the power amplifier. A feedforward linearizer usually uses a combination of signal adjuster circuit s
110
and distortion adjuster circuit d
111
as configured in
FIG. 1
(in this linearizer, predistortion adjuster p
109
is not used). In an alternative configuration, the signal adjuster circuit may be placed before the power amplifier, i.e., as adjuster circuit p
109
, an example of which is shown in FIG.
7
. This latter configuration advantageously compensates for any additional signal distortion caused by the signal adjuster circuit, since it will be superimposed upon the distortion caused by the power amplifier and be removed by a distortion cancellation circuit. Further, adjusters p
109
, s
110
, and d
111
may be used simultaneously to linearize the power amplifier.
As shown in
FIG. 1
, a feedforward linearizer comprises two main circuits: a signal cancellation circuit
101
and a distortion cancellation circuit
102
. The RF signal is input to the signal power amplifier
103
, which as discussed above, is assumed to be operating in a non-linear range and thus distorting the output signal. The signal cancellation circuit
101
ideally subtracts a linear estimate of the RF signal from the distorted power amplifier output signal so that only the nonlinear distortion signal (or “error signal”) (v
e
) remains. As will be appreciated to those skilled in the art, the signal pickoff points, the adder
104
, and the subtractors
106
and
107
shown in FIG.
1
and other figures may be implemented by directional couplers, splitters or combiners, as appropriate. In the distortion cancellation circuit
102
, the distortion signal is adjusted and amplified by error amplifier
108
to match the distortion signal component of the power amplifier output signal delayed by delay
112
. The amplified distortion signal is then subtracted from the output of delay
112
by subtractor
107
to provide the linearizer output signal v
o
. The linearizer output signal is a substantially distortion-free amplified RF signal, the output that would have been obtained if the power amplifier were truly linear.
Generally, the adjuster circuits discussed above do not necessarily all have the same structure—adjuster circuits p
109
, s
110
and d
111
may all be implemented with different circuitry. For example, the adjuster circuit p
109
may be a nonlinear polynomial filter, while the adjuster circuits s
110
and d
111
may be finite impulse response (FIR) filters. In addition, some methods of controlling these adjuster circuits may employ pilot (tone) signals generated by an optional pilot signal generator
113
.
The relationship of the input and output signals of an adjuster circuit depends on the settings of one or more parameters of that adjuster circuit, as will be discussed in further detail below. During adaptation, the values of one or more internal signals of an adjuster circuit are used to determine appropriate settings for its parameters. As shown in
FIG. 1
, an “adaptation controller”
114
monitors the error and output signals v
e
and v
o
, and in some cases, the internal adjuster signals. (In FIG.
1
and other figures, a stroke on an arrow denotes a multiplicity of signals or a multiplicity of parameters, as the case may be.) On the basis of the monitored signal values, and in accordance with the adaptation algorithm, the adaptation controller sets the adjuster circuit parameters.
For example, a three-branch adaptive polynomial predistortion adjuster circuit p
109
is shown in FIG.
2
. The upper branch
200
is linear, while the middle branch has a nonlinear cubic polynomial filter
201
and the lower branch has a nonlinear quintic polynomial filter
202
, the implementation of which nonlinear filters is well known to those skilled in the art. Each branch also has a complex gain adjuster (“CGA”), respectively
203
,
204
, and
205
, to adjust the amplitude and phase of the signal as it passes therethrough. By setting the parameters (GA, GB) of each of the CGAs, a polynomial relationship between the input and output of the adjuster circuit can be established to compensate for a memoryless nonlinearity in the power amplifier. The adaptation controller, via a known adaptation algorithm, uses the input signal, the output of the nonlinear cubic polynomial filter, the output of the nonlinear quintic polynomial filter, and the error signal (the power amplifier output signal minus an appropriately delayed version of input signal) to generate the parameters (GA, GB) for the three CGAs. Generally, the adaptation algorithm is selected to minimize a certain parameter related to the error signal (for example, its power over a predetermined time interval). Examples of such adaptation algorithms are described in more detail below.
Two possible CGA implementations are respectively shown in
FIGS. 3A and 3B
. The implementation shown in
FIG. 3A
uses polar control parameters GA and GB, where GA sets the amplitude of the attenuator
301
, while GB sets the phase of the phase shi
Cavers James K.
Johnson Thomas
Fitzpatrick ,Cella, Harper & Scinto
Nguyen Khanh Van
Simon Fraser University
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