Amplifiers – With semiconductor amplifying device – Including particular biasing arrangement
Reexamination Certificate
2000-12-06
2002-12-10
Nguyen, Patricia (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including particular biasing arrangement
C330S285000
Reexamination Certificate
active
06492875
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention is in the field of transistor amplifier circuits, and relates more particularly to a power amplifier circuit having a self-bias boosting circuit for increasing maximum power output and reducing power dissipation at low power levels.
Amplifiers of this general type are frequently used in high-frequency RF amplifiers, as well as in audio amplifiers and other applications. In order to obtain a linear input-output relationship and high operating efficiency, such amplifiers are typically operated with a conduction angle of about 180° (Class B) or slightly greater (Class AB) to avoid crossover distortion.
Typically, amplifiers of this type require a dc bias circuit to establish the quiescent bias current in the amplifier circuit to ensure operation in the Class B or Class AB mode. In the prior art, bias is typically provided by a fixed current source, as shown in U.S. Pat. No. 5,844,443, or else by an external supply, which can be set to a desired constant value to secure the quiescent current necessary to operate in the desired mode, as shown in U.S. Pat. No. 5,548,248.
However, in amplifiers of the type described above the average current drawn from the supply depends upon the input signal level. As the output power increases so does the average current in both the emitter and the base of the power transistor. This increased average current causes an increased voltage drop in the biasing circuitry and in ballast resistors (which are used to avoid hot-spotting and thermal runaway in transistors using an interdigitated design). This in turn reduces the conduction angle (i.e. the number of degrees out of 360° that the amplifier is conducting), and forces the amplifier deep into Class B or even Class C operation, thereby reducing the maximum power output. To avoid this power reduction, the amplifier must have a larger quiescent bias. In prior-art circuitry this inevitably leads to a higher power dissipation at low power output levels and therefore an undesirable tradeoff in operating characteristics.
A recent improvement in this art is disclosed in co-pending U.S. patent application Ser. No. 09/536,946, entitled Dynamic Bias Boosting Circuit For A Power Amplifier, filed on Mar. 28, 2000 by Sowlati and Luo, two of the present inventors. This application discloses a solution to the problem discussed above which entails providing the power amplifier circuit with a dynamic bias boosting circuit to dynamically increase the bias of the power transistor as the output power increases by using a circuit that senses the input voltage to the amplifier and generates a dynamic bias boost as a function of the amplitude of this signal. The drawback to this solution is that it employs numerous active and passive components, thus not maximizing simplicity, compactness and economy of manufacture.
Accordingly, it would be desirable to have a power amplifier circuit which offers the advantages of optimum maximum output power and reduced power dissipation at low power levels. Additionally, it would be desirable for such a circuit to be extremely simple and compact in design, and very economical to manufacture.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a power amplifier circuit which provides improved maximum output power and less power dissipation at low power levels. It is a further object of the invention to provide a power amplifier circuit which is both extremely simple and compact in design and which is very economical to manufacture.
In accordance with the invention, these objects are achieved by a new power amplifier circuit for amplifying an input signal and having a conduction angle of at least about 180°, the amplifier circuit including an amplifying transistor and a dc bias circuit for biasing the amplifier transistor to obtain the desired conduction angle. The dc bias circuit includes a self-bias boosting circuit for initially decreasing and then increasing the dc bias voltage provided to a control terminal of the amplifying transistor by the dc bias circuit as the input signal provided to the power amplifier increases.
In a preferred embodiment of the invention, the amplifier circuit is either a Class B or a Class AB amplifier circuit.
In a further preferred embodiment of the invention, the self-bias boosting circuit includes a capacitor coupled from an output terminal of the self-bias boosting circuit to a common terminal, and a resistor coupled between the output terminal and the control terminal of the amplifying transistor.
In yet a further preferred embodiment of the invention, the self-bias boosting circuit also includes a switch coupled in series with the capacitor for enabling the power amplifier circuit to operate in either of two output power modes.
A power amplifier circuit in accordance with the present invention offers a significant improvement in that a particularly advantageous combination of features, including increased maximum output power and reduced power dissipation at low power levels, can be obtained in an extremely simple, compact and economical configuration.
These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter.
REFERENCES:
patent: 5060294 (1991-10-01), Schwent et al.
patent: 5243301 (1993-09-01), Tondryk
patent: 5345192 (1994-09-01), Green
patent: 5548248 (1996-08-01), Wang
patent: 5670912 (1997-09-01), Zocher
patent: 5844443 (1998-12-01), Wong
patent: 5995814 (1999-11-01), Yeh
Burger Kerry
Joly Chris
Luo Sifen
Sowlati Tirdad
Biren Steven R.
Koninklijke Philips Electronics , N.V.
Nguyen Patricia
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