Self-biasing timing circuit for achieving long time delays

Details Self-biasing timing circuit for achieving long time delays Self-biasing timing circuit for achieving long time delays

1990-10-03

1992-07-07

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307597, 307603, 307605, 328 55, 360 75, H03K 5159, G11B 2102

Patent

active

051285681

ABSTRACT:
A timing circuit in which an output can be held at a certain level or state for a particular time after the circuit is enabled. The time is established by an external resistor and capacitor. The timing circuit is self-biasing to permit operation after associated power supplies have dropped to zero. The timing of the circuit is independent of supply voltage and substantially independent of temperature variations. The timing circuit includes a number of MOSFET's which are diode connected between two nodes, and another MOSFET having a gate and one conduction electrode connected across the two nodes. The voltage between the two nodes at the beginning of the timing interval is the sum of the threshold voltages of the diode connected MOSFET's. At the end of the timing interval, the voltage between the two nodes has fallen to the threshold voltage of the single MOSFET. The timing interval is therefore dependent upon the discharge rate set by the external resistor and capacitor and the ratio of the sum of the threshold voltages of the plurality of MOSFET's to the threshold voltage of the single MOSFET. Relatively long time intervals can be achieved using this circuit with standard surface mount components for the resistor and capacitor. The circuit finds particular use in a disk drive in which a head actuator must be braked for a period of time and then retracted, with the period of time determined in an environment where the disk drive power supplies are falling to zero.

REFERENCES:
patent: 4237501 (1980-12-01), Barmache
patent: 4311948 (1982-01-01), Brown
patent: 4591745 (1986-05-01), Shen
patent: 4658308 (1987-04-01), Sander
patent: 4985646 (1991-01-01), Kumagai et al.

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