Self-biased phase-locked loop

Details Self-biased phase-locked loop Self-biased phase-locked loop

1996-01-29

1997-05-13

Mis, David

Oscillators

Automatic frequency stabilization using a phase or frequency...

Particular error voltage control

331 8, 331 34, 331108R, 331177R, 327157, H03L 7085, H03L 7099

Patent

active

056296509

ABSTRACT:
According to the preferred embodiment, a self-biased phase-locked loop is provided that overcomes the limitations of the prior art bias methods and apparatus. In general, a self-biased current controlled semiconductor device, typically a current controlled oscillator, is self biased by the use of a first feedback path, typically provided by a phase-locked loop, where the feedback path provides a control current for controlling the current controlled device. A second feedback path, typically a pair current mirrors, serves as a bias loop having unity gain. The bias loop provides a bias current that is responsive to the control current. This device has the advantage of being self biasing, thus no other biasing circuitry is required.

REFERENCES:
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patent: 5185584 (1993-02-01), Takeuchi
patent: 5300898 (1994-04-01), Chen et al.
patent: 5331295 (1994-07-01), Jelinek et al.
patent: 5334953 (1994-08-01), Mijuskovic
patent: 5347233 (1994-09-01), Ishibashi et al.
patent: 5399994 (1995-03-01), Siniscalchi et al.
patent: 5469120 (1995-11-01), Nguyen et al.

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