Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – Bidirectional rectifier with control electrode
Patent
1997-01-10
1999-05-25
Trinh, Michael
Active solid-state devices (e.g., transistors, solid-state diode
Regenerative type switching device
Bidirectional rectifier with control electrode
257133, 257547, H01L 2974
Patent
active
059071630
ABSTRACT:
A substrate (10) of a semiconductor device includes a power section (12) and a control section (14). The power section includes doped regions (16, 18, 20) and terminals (22, 24, 26) which define power devices such as transistors or SCRs. The control region also includes doped areas including a parasitic collector (32). A minority carrier current (62) flows from the doped regions of the power section to the collector of the control section when the power device to substrate junction is forward-biased. A self-biased moat assembly (40) includes a first doped region (42) between the doped regions of the power and control sections under which the parasitic minority carrier current flows. An electrical connection (46) connects the moat first doped region (42) with a moat second doped region (44). The self-biased moat assembly is isolated from ground such that it is self-biased negative in accordance with internal operating conditions of the semiconductor device. The minority charge carriers are collected by the moat first doped region. A current is created that flows from the first doped region through the electrical conductor to the moat second doped region. The current loop is completed by majority carriers flowing through the substrate from the first section under the first doped region toward the second doped region. The majority carriers cause a voltage drop under the moat first doped region that results in an electric field that forms a minority carrier gradient which reduces parasitic minority carrier current flowing to the control section (14).
REFERENCES:
patent: 3590345 (1971-06-01), Brewer
patent: 3931634 (1976-01-01), Knight
patent: 4245209 (1981-01-01), Bertotti et al.
patent: 4266233 (1981-05-01), Bertotti et al.
patent: 4319262 (1982-03-01), Bertotti et al.
patent: 4571505 (1986-02-01), Eaton, Jr.
patent: 4580330 (1986-04-01), Pollack et al.
patent: 4614962 (1986-09-01), Bertotti et al.
patent: 4626882 (1986-12-01), Cottrell et al.
patent: 4631561 (1986-12-01), Foroni et al.
patent: 4635087 (1987-01-01), Birrittella et al.
patent: 4641171 (1987-02-01), Bertotti et al.
patent: 4641172 (1987-02-01), Iwatani
patent: 4663647 (1987-05-01), Bertotti et al.
patent: 4672235 (1987-06-01), Villa et al.
patent: 4682197 (1987-07-01), Villa et al.
patent: 4725810 (1988-02-01), Foroni et al.
patent: 4731343 (1988-03-01), Beinvogl
patent: 4739378 (1988-04-01), Ferrari et al.
patent: 4740821 (1988-04-01), Bertotti et al.
patent: 4786827 (1988-11-01), Gariboldi et al.
patent: 4829344 (1989-05-01), Bertotti et al.
patent: 4862242 (1989-08-01), Wildi et al.
patent: 4882532 (1989-11-01), Gariboldi et al.
patent: 4887141 (1989-12-01), Bertotti et al.
patent: 4887142 (1989-12-01), Bertotti et al.
patent: 4890149 (1989-12-01), Bertotti et al.
patent: 4899098 (1990-02-01), Gariboldi
patent: 4910159 (1990-03-01), Bertotti et al.
patent: 4922317 (1990-05-01), Mihara
patent: 5021860 (1991-06-01), Bertotti et al.
patent: 5072273 (1991-12-01), Avery
patent: 5119263 (1992-06-01), Gariboldi et al.
patent: 5155568 (1992-10-01), Pernyeszi
patent: 5182470 (1993-01-01), Gariboldi et al.
patent: 5185649 (1993-02-01), Bertotti et al.
patent: 5204273 (1993-04-01), Kuhnert et al.
patent: 5455434 (1995-10-01), Pfirsch
patent: 5491358 (1996-02-01), Miyata
patent: 5506152 (1996-04-01), Whitney
patent: 5719431 (1998-02-01), Werner
"Microcontroller Switches 5-A, 60-V Current Pulses", Goodenough, Electronic Design, Oct. 14, 1993, pp. 71-79.
"A Monolithic Quad Line Driver For Industrial Applications", Gariboldi, et al. IEEE Journal of Solid-State Circuits, v. 29, No. 8, Aug. 1994, pp. 957-962.
"Power Integrated Circuits, Physics, Design, and Applications", Editor Antognetti, Univ. of Genoa, Sect. 4.7 -"Parasitics in PICs", F. Bertotti, pp. 4.19-4.25.
Galecki Steven M.
Skebe Gerard G.
Horn John J.
Miller John M.
Reliance Electric Industrial Company
Trinh Michael
Walbrun William R.
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