Self-biased, high-gain differential amplifier with feedback

Details Self-biased, high-gain differential amplifier with feedback Self-biased, high-gain differential amplifier with feedback

1990-01-02

1990-06-26

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307451, 307482, 307578, 307585, 307362, 3072968, 330277, 330253, H03K 1704, H03K 17687, H03K 19017, H03K 19094

Patent

active

049374761

ABSTRACT:
A self-biased, high-gain differential amplifier which is substantially immune to process and temperature variations. A first pair of CMOS transistors is coupled to operate in an active region and an output from the common junction is coupled to drive a second pair of CMOS transistors. The second pair of CMOS transistors have their outputs coupled to provide a negative feedback to the first pair of CMOS transistors. A third pair of CMOS transistors is coupled in parallel to the first pair of CMOS transistors for accepting an input signal and generating an output, wherein the output is a function of the input signal in relation to a reference voltage. A fourth pair of CMOS transistors is coupled to be driven by the third pair of CMOS transistors and provides a CMOS compatible signal which switches between two CMOS logic states.

REFERENCES:
patent: 3914702 (1975-10-01), Gehweiler
patent: 4074150 (1978-02-01), Buckley et al.
patent: 4074151 (1978-02-01), Buckley et al.
patent: 4430582 (1984-02-01), Bose et al.
patent: 4437024 (1984-03-01), Wacyk
patent: 4438352 (1984-03-01), Mardkha
patent: 4477736 (1984-10-01), Onishi
patent: 4563595 (1986-01-01), Bose
patent: 4677321 (1987-06-01), Bacrania

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