Self-biased differential receiver cells for CMOS

Details Self-biased differential receiver cells for CMOS Self-biased differential receiver cells for CMOS

1998-05-04

2000-04-04

Wambach, Margaret R.

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

327563, 330261, H03F 345

Patent

active

060466103

ABSTRACT:
A differential receiver cell circuit is provided for a CMOS chip for use in chip to chip interfaces. The differential receiver cell is testable to enable the testing of the functioning of other circuits on the CMOS chip. The receiver cell is provided (between a voltage source VDD! and ground GND!) with a bias switch circuit comprising a PFET T115 having its drain connected to the receiver cell's voltage source. This source has a node VDD! connected to a self biasing network composed of PFET T106 and NFET T107 whose input node NB and output are connected to control a current controlling device NFET T118 whose drain is connected to a common node NA and whose source is coupled to ground.

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