Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
2001-09-07
2004-08-24
Callahan, Timothy P. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
C330S267000
Reexamination Certificate
active
06781442
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a self-bias adjustment circuit, arranged on a previous stage of an internal circuit, for supplying an appropriate signal to an internal circuit.
BACKGROUND OF THE INVENTION
As a conventional self-bias adjustment circuit, for example, a self-bias adjustment circuit disclosed in a reference “Design Considerations for Very-High-Speed Si-Bipolar IC's Operating up to 50 Gb/s”, H.-M. rein (IEEE Journal of Solid-State Circuits, vol. 31, no. 8, pp. 1076-1090, August 1996).
FIG. 6
is a schematic diagram showing the configuration of an integrated circuit including the conventional self-bias adjustment circuit. This integrated circuit
82
comprises an input terminal
87
which receives a signal current I
80
from an output circuit
84
of another integrated circuit
81
through a signal transmission line
86
, a terminal resistor
88
(resistance RS
80
) arranged between a high-potential side
82
a
of the power supply of the integrated circuit
82
and the input terminal
87
, and an internal circuit
89
.
A potential difference VGAP
80
is generated across the low-potential side
81
b
of the power supply of the other integrated circuit
81
and a low-potential side
82
b
of the power supply of the integrated circuit
82
. The output circuit
84
of the other integrated circuit
81
has a signal current source
85
to output the signal current
180
from the signal current source
85
to the signal transmission line
86
. The terminal resistor
88
constitutes a self-bias adjustment circuit
91
. The power supply voltage of the integrated circuit
81
and the power supply voltage of the integrated circuit
82
are equal to each other. More specifically, equation (1) is established:
(
VCC
81−
VEE
81)=(
VCC
82−
VEE
82) (1)
In this equation, VCC
81
denotes the voltage of a high-potential voltage side
81
a
of the power supply of the integrated circuit
81
, VEE
81
denotes the voltage of the low-potential side
81
b
of the power supply of the integrated circuit
81
, VCC
82
denotes the voltage of the high-potential side
82
a
of the power supply of the integrated circuit
82
, and VEE
82
denotes the voltage of the low-potential side
82
b
of the power supply of the integrated circuit
82
. The internal circuit
89
may be an internal circuit having a single-phase output or an internal circuit having a differential output. The output impedance of the output circuit
84
is equal to the impedance of the signal transmission line
86
. The impedance of the terminal resistor
88
is equal to the impedance of the signal transmission line
86
. The internal circuit
89
has a high-input impedance of several k&OHgr; or more.
The signal current I
80
output from the output circuit
84
is flowed into the high-potential side
82
a
of the power supply of the integrated circuit
82
through the input terminal
87
and the terminal resistor
88
. If a potential difference VGAP
80
is 0 volt, a DC voltage VDC
80
across the input terminal
87
and an input terminal
90
can be expressed by equation (2). A signal amplitude (amplitude of signal voltage) VAC
80
between the input terminals
87
and
90
can be expressed by equation (3).
VDC
80=
VCC
82−(
I
80×
RS
80)/2 (2)
VAC
80=
I
80×
RS
80 (3)
When bias design for the internal circuit
89
is performed in accordance with signal voltages expressed by equation (2) and equation (3), the internal circuit
89
can be normally operated. In this manner, a self-bias adjustment circuit can be constituted by a simple circuit obtained by the terminal resistor
88
having the function of impedance matching and the function of terminating.
The integrated circuit
81
and the integrated circuit
82
are not necessarily mounted on the same substrate or in the same housing. In addition, even though the integrated circuit
81
and the integrated circuit
82
are mounted on the same substrate, voltage drop caused by a pattern resistor may occur because a pattern is drawn on the substrate. For this reason, the potential difference VGAP
80
may not be 0 volt. The DC voltage VDC
80
and the signal amplitude VAC
80
can be expressed by equations (4) and (5), respectively, using the voltage VEE
82
:
VDC80
=
VCC82
-
(
I80
×
RS80
)
/
2
+
VGAP80
(
4
)
VAC80
=
(
VCC82
-
(
(
VCC82
-
(
I80
×
RS80
)
/
2
)
+
VGAP80
)
)
×
2
=
(
(
I80
×
RS80
)
/
2
)
-
VGAP80
)
×
2
=
(
I80
×
RS80
)
-
2
VGAP80
(
5
)
According to equation (4), the DC voltage VDC
80
across the input terminals
87
and
90
is shifted from a design value at which the internal circuit
89
can be normally operated by volts corresponding to the potential difference VGAP
80
. According to equation (5), the signal amplitude VAC
80
across the input terminals
87
and
90
is shifted from a design value by (−2×VGAP
80
) volts.
As a conventional self-bias adjustment circuit for avoiding a signal voltage from being shifted by the potential difference VGAP
80
, a self-bias adjustment circuit in which a capacitor is inserted on a signal line for transmitting an input signal, a signal component passes through the capacitor, and a DC voltage expressed by equation (2) is superposed on the signal component is known. In this self-bias adjustment circuit, the influence of the potential difference VGAP
80
is suppressed by the capacitor inserted on the signal line.
However, according to the above-described conventional self-bias adjustment circuit (Design Considerations for Very-High-Speed Si-Bipolar IC's Operating up to 50 Gb/s″), since the self-bias adjustment circuit has no function of suppressing the influence of the potential difference VGAP
80
, a shift between a bias voltage and a signal amplitude at the input terminal
90
of the internal circuit
89
is generated, and the internal circuit
89
may not be appropriately operated. In addition, the signal amplitude is disadvantageously deteriorated.
According to the conventional self-bias adjustment circuit having the capacitor, since a capacitor is inserted on a signal line for transmitting an input signal, when the input signal has a frequency component of a wide band, the low-frequency component of the input signal is attenuated, and the input signal is disadvantageously degraded. When the capacitance of the capacitor is set large (e.g., 1 nF or more) to pass the signal components of the wide band, the capacitor increases in size. For this reason, the capacitor is not easily formed in the integrated circuit, and the capacitor must be formed out of the integrated circuit. Therefore, peripheral devices increases in size, and the cost disadvantageously increase.
SUMMARY OF THE INVENTION
It is an object of this invention to obtain a self-bias adjustment circuit which can appropriately operate the internal circuit while suppressing the size and cost of the device from being increased and which can reduce a deterioration of a signal amplitude.
In the self-bias adjustment circuit according to the present invention, a detection unit detects the bias voltage of the input signal, and a superposing unit superposes the correction voltage for correcting the bias voltage to the predetermined voltage on the input signal to output the signal to the internal circuit.
Other objects and features of this invention will become apparent from the following description with reference to the accompanying drawings.
REFERENCES:
patent: 4142110 (1979-02-01), Weber
patent: 4535294 (1985-08-01), Ericksen et al.
patent: 4672327 (1987-06-01), Wittlinger
patent: 5297097 (1994-03-01), Etoh et al.
patent: 5347577 (1994-09-01), Takato et al.
patent: 5537024 (1996-07-01), Lang
patent: 5714895 (1998-02-01), Mori et al.
patent: 5796781 (1998-08-01), DeAndrea et al.
patent: 5844439 (1998-12-01), Zortea
patent: 5994888 (1999-11-01), Yanagawa
patent: 0380976 (1990-08-01), None
patent: 0489927 (1992-06-01), None
patent: 02177724 (1990-07-01), None
patent: A3208369 (1991-09-0
Callahan Timothy P.
Mitsubishi Denki & Kabushiki Kaisha
Nguyen Linh M.
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