Electricity: measuring and testing – Impedance – admittance or other quantities representative of... – Using a particular bridge circuit
Reexamination Certificate
2002-08-27
2004-02-24
Le, N. (Department: 2816)
Electricity: measuring and testing
Impedance, admittance or other quantities representative of...
Using a particular bridge circuit
C324S713000
Reexamination Certificate
active
06696846
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATION(S)
This application claims the benefit of Taiwan Patent Application No. 91119191, filed Aug. 23, 2002, which is hereby incorporated by reference in its entirety.
TECHNICAL FIELD
The present invention relates to a balancing scheme for detecting the output current of the signal source or the impedance of the plugged external device, and specifically, to a self-balanced active current bridge for measuring the impedance of the external device or the output current.
BACKGROUND
There is a proposal provided by the operating system platform maker Microsoft for analog audio device classification, in order to operating systems to properly configure analog audio, based their device type, operation system platform maker recommends that manufactures design their devices to their required impedance criteria. For example, they require the impedance of the microphone is about 400 to 1500 ohms, the impedance of the powered speaker is about 3000 to 12000 ohms, and the one of the passive speaker ranges from 4 to 16 ohms. The data collected for headphone includes impedance measured above 32-100 ohms range. Under such consideration, when the user plugs external device into the computer system, the system will detect the impedance of the device, if the user plugs the device into a wrong connector then the system will alarm the user to re-plug.
The current is typically detected by serially connecting a current meter to read the data or by an inductance coil to achieve the purpose. In the method, the magnetic field generated by the current flows through the inductance coil will induction potential thereon that can be measured. The typical method has a limitation for implanting them into ICs. It is unlikely to integrate the scheme into the single chip circuit. If we would like to detect the current by using the serially connected resistance, the resistance itself alters the scheme under measuring and will influence the accurate data, it is hard to decide the range of the resistance.
If the meter is used to measure the impendent, the device under measuring will be implant into the circuit and become one part of the bridge circuits. Therefore, a lot of switchers are needed and the cost is also increased.
SUMMARY
The yet object of the present invention is to provide a self-balanced active current bridge for measuring the output current of the input signal source.
A self-balanced active current bridge for measuring the impedance of an external device or an output current, comprising an input signal source and operation amplifier connected to the input potential source via a first input terminal of the operation amplifier. A balancing bridge is coupled to a first output terminal and a second output terminal of the operation amplifier. A controlled potential source is coupled to the balancing bridge and used to maintain the balance state of the balancing bridge. A resistance is connected between the balancing bridge and an output terminal of the controlled potential source. Wherein the external device is connected a first node between the balancing bridge and a second input terminal of the operation amplifier. Wherein the controlled potential source is coupled to the balancing bridge to maintain the balance state, thereby constructing the self-balanced active current bridge for measuring the impedance of the external device or the output current by means of measuring the potential variation of the resistance. The balancing further comprising:
a first driving means for providing current to the external device;
a second driving means, wherein the first driving means and the second driving means are connected to a reference voltage of voltage supplier and ground potential, thereby constructing the balancing bridge;
wherein the controlled potential-source is coupled the output of the second driving means for sending current or potential to the balancing bridge, and there is a feedback system formed between the balancing bridge and the controlled potential source for the second driving means to follow the change of the first driving means, thereby maintain the balancing state and obtaining the output state of the external device driven by the first driving means by using the second driving means.
The first driving means is consisted of a first PMOS transistor and a first NMOS transistor, the second driving means is consisted of a second PMOS transistor and a second NMOS transistor. The gates of the first PMOS transistor and the second PMOS transistor are coupled to the first output terminal of the operation amplifier. The gates of the first NMOS transistor and the second NMOS transistor are coupled to the second output terminal of the operation amplifier.
The sources of the first PMOS transistor and the second PMOS transistor are coupled to the reference voltage. The drain of the first PMOS transistor is coupled to the drain of the first NMOS transistor, wherein the drain of the second PMOS transistor is coupled to the drain of the second NMOS transistor. The sources of the first NMOS transistor and the second NMOS transistor are coupled to the ground potential. The first node is coupled to the common drain of the first PMOS transistor and the first NMOS transistor. The resistance is connected to the second driving means via a second node that is coupled to the common drain of the second PMOS transistor and the second NMOS transistor
The output potential of the controlled potential source is the function of the difference potential between the first and second input terminals, wherein the first input terminal of the controlled potential source is coupled to the second input terminal of the operation amplifier via the common drain of the first PMOS transistor and the first NMOS transistor, and the second input terminal of the controlled potential source is coupled to the common drain of the second PMOS transistor and the second NMOS transistor.
REFERENCES:
patent: 5225784 (1993-07-01), So
patent: 5457393 (1995-10-01), Trolle
patent: 5703490 (1997-12-01), Kennedy
Shieh Wen-Lung
Tseng Chih-Hung
C-Media Electronics Inc.
Le N.
Nguyen Vincent Q.
Perkins Coie LLP
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