Self-assigning address system

Details Self-assigning address system Self-assigning address system

1979-03-08

1981-02-24

Yusko, Donald J.

Communications: electrical

Digital comparator systems

361409, 361413, H04Q 900

Patent

active

042530873

ABSTRACT:
An address system for selectively addressing any one of a number of serially connected addressable units from one or more control units by means of an identical signaling device, such as an electronic circuit, positioned at each device location. The signaling device has an input connector and an output connector for connecting each signaling device to a parallel bus which connects each signaling device to the other signaling devices in series. The signaling device operates in the same manner at each addressable unit location by permuting signals appearing on the input connector, and connecting the permuted input connector signals to the corresponding output connector of the same signaling device. The output connector of the permuted signaling device is then connected via a parallel bus to the input connector of the next signaling device. The signaling device thus operates in the same manner at each addressable unit location.

REFERENCES:
patent: 1652262 (1927-12-01), Torchio
patent: 3487076 (1969-12-01), Abbott et al.
patent: 3921168 (1975-11-01), Dunbar
patent: 3949277 (1976-04-01), Yosset
patent: 4016369 (1977-04-01), Pedersen

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