Coded data generation or conversion – Digital code to digital code converters – To or from variable length codes
Patent
1990-11-29
1992-10-27
Logan, Sharon D.
Coded data generation or conversion
Digital code to digital code converters
To or from variable length codes
341120, 341144, 341122, H03M 740, H03M 166, H03M 106
Patent
active
051593378
ABSTRACT:
A self-aligning sampling system for sampling digital signals, for example in a logic analyzer includes an adjustable delay line fed by a system clock signal which delay line has tapping points for further clock signals. In conjunction with the system clock, the further clock signals are used to take several samples of the digital signal in a time slot of the system clock. In order to achieve equidistant sampling even in the case of a large process spread in elementary delay units of the delay line, the delay line is calibrated. The system clock is then connected to the data input and expressed in elementary delay units on the basis of measurement. Subsequently, the delay line between clock signal tapping points is adjusted on the basis thereof.
REFERENCES:
patent: 4345241 (1982-08-01), Takeuchi et al.
patent: 4464726 (1984-08-01), Chiang
patent: 4736189 (1988-04-01), Katsumata et al.
patent: 4763105 (1988-08-01), Jenq
patent: 4833445 (1989-05-01), Buchele
patent: 5008674 (1991-04-01), Da Franca et al.
Fluke & Philips--The Global Alliance in Test & Measurement, "An ABC Of Logic Analysis", pp. 1-37.
Logan Sharon D.
Slobod Jack D.
U.S. Philips Corp.
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