Self-aligning metal interconnect fabrication

Details Self-aligning metal interconnect fabrication Self-aligning metal interconnect fabrication

1989-10-10

1991-01-29

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 43, 437 43, 437 44, 437 57, 437985, H01L 2190, H01L 2170

Patent

active

049886436

ABSTRACT:
In a method for fabricating a MOS device, a nitride cap is formed over a remote interconnect of gate material. In a subsequent oxide growth step, oxide is formed over another remote interconnect and transistor gates, while the nitride cap prevents oxide growth over the first remote interconnect. Thinner oxide over source and drain regions is removed, leaving oxide formations over the gates and the second interconnect; the nitride cap is also removed. Silicide is then formed over the source and drain regions and over portions of the first remote interconnect. A conducting layer is deposited and a local interconnect is then patterned therefrom which electrically connects the first remote interconnect to at least one source/drain region without using via holes. This local interconnect crosses over the second remote interconnect, while being insulated from it by the oxide formation. The result of the method is an integrated circuit device with this bridging interconnect and compact dimensions, the latter due to the relaxed tolerances afford by the self-aligning features of the method.

REFERENCES:
patent: 4192059 (1980-03-01), Khan et al.
patent: 4528744 (1985-04-01), Shibata
patent: 4587711 (1986-05-01), Godejahn, Jr.
patent: 4701423 (1987-10-01), Szluk
patent: 4877755 (1989-10-01), Rodder

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