Self-aligned transistor method

Details Self-aligned transistor method Self-aligned transistor method

1986-09-16

1987-12-08

Powell, William A.

Fishing, trapping, and vermin destroying

148 15, 148187, 156653, 156656, 156657, 1566591, 156651, 437 41, 437245, 437912, H01L 21306, C23F 100, B44C 122, C03C 1500

Patent

active

047117010

ABSTRACT:
A method of fabrication for self-aligned gallium arsenide transistors using metal implant masks is disclosed. Preferred embodiments include use of a dummy gate (150) made of aluminum (144) on top of titanium tungsten (142) as an implant mask for source (52) and drain (54) formation with the titanium tungsten (142) undercut so that deposited silicon dioxide (62) will form a self-aligned mask for the gate deposition after the dummy gate (150) is removed.

REFERENCES:
patent: 4387145 (1983-06-01), Lehrer et al.
patent: 4503599 (1985-03-01), Ueyanagi et al.
patent: 4532004 (1985-07-01), Akiyama et al.
patent: 4561169 (1985-12-01), Miyazaki et al.
patent: 4569124 (1986-02-01), Rensch et al.
patent: 4597827 (1986-07-01), Nishitani et al.

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