Self-aligned thin film transistor with sidewall spacers

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...

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257 69, 257 71, 257347, 257348, H01L 2976, H01L 2701

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active

055526144

ABSTRACT:
This invention relates to the Thin Film Transistor having the self-aligned diffused source/drain regions for improving the ratio of on to off current and the method of fabricating the same. The method of making TFT comprising the steps of forming a gate electrode around a central portion of a substrate, forming a gate insulating layer over the substrate and covering the gate electrode, forming a semiconductor layer on the gate insulating layer, forming sidewall spacers on stepped potions of the first semiconductor layer near both sides of the gate electrode, forming a doped semiconductor layer over the whole surface of the substrate, patterning the second semiconductor layer to form one of the patterned second semiconductor layers formed over the first semiconductor layer and apart from the one sidewall spacer near one side of the gate electrode, and the other formed over the first semiconductor layer and the other sidewall spacer near the other side of the gate electrode, and diffusing the impurity in the second semiconductor layer through the anneal process to form highly doped impurity regions in the underlying first semiconductor layer.

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patent: 5403761 (1995-04-01), Rha
"16Mbit SRAM Cell Technologies for 2.0V Operation" by H. I. Ohkubo et al, VLSI Development Division, LSI memory Division, NEC Corporation, Sagamihara, Kangagawa 229, Japan, published by IEEE, 1991.

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