Self-aligned thin-film transistor constructed using lift-off tec

Details Self-aligned thin-film transistor constructed using lift-off tec Self-aligned thin-film transistor constructed using lift-off tec

1995-09-25

1996-07-30

Thomas, Tom

Fishing, trapping, and vermin destroying

437 40, 148DIG100, H01L 2186

Patent

active

055411282

ABSTRACT:
In the fabrication of thin-film field-effect transistors, a dielectric island is first formed over a gate and between locations where source and drain contacts are to be deposited. A dielectric cap with an overhanging brim is formed on the island. A layer of SD metal which will form the source-drain contacts is next deposited. Because of the overhang, the SD metal does not coat the entire cap, but leaves part of the cap remaining exposed and attackable by an etchant. Application of an etchant etches away the island and the cap, thereby lifting off the SD metal coated on the cap, leaving the fully-formed source and drain contacts in place, separated by the extent of the island.

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patent: 5010027 (1991-04-01), Possin et al.
patent: 5166086 (1992-11-01), Takeda et al.
Webster's II New Riverside University Dictionary, 1984, p. 296.
Webster's II New Riverside University Dictionary, pp. 69 and 78, 1984.
K. Asama et al., "A Self-Alignment Processed a-Si TFT Matrix Circuit for LCD Panels", Fujitsu Laboratories, Ltd, Atsugi, Japan, SID Digest, 1983, pp. 144-145.
B. Diem et al., "a-Si:H TFT: Potential Suitabilities for Gate and Source-Drain Self-Aligned Structure", Mat. Res. Soc. Symp. Proc., vol. 33 (1984), pp. 281-285.
G. Possin, et al., "Contact-Limited Behavior in Amorphous-Silicon FET for Applications to Matrix-Addressed Liquid-Crystal Displays", pp. 183-189, Proc. of the SID, vol. 26/3, 1985.

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