Self-aligned stacked gate EPROM cell using tantalum oxide contro

Details Self-aligned stacked gate EPROM cell using tantalum oxide contro Self-aligned stacked gate EPROM cell using tantalum oxide contro

1992-10-13

1994-04-19

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 48, 257315, H01L 27115, H01L 21265

Patent

active

053045033

ABSTRACT:
A process flow for fabricating a self-aligned stacked gate EPROM cell that uses a CVD tantalum oxide film to replace ONO as a control gate dielectric. Tungsten replaces polysilicon as the control gate. Both the dielectric deposition and cell definition steps of the process flow are performed in a back-end module to improve dielectric integrity in the memory cells by minimizing high temperature exposure of the tantalum oxide film.

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patent: 5021848 (1991-06-01), Chiu
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patent: 5225359 (1993-07-01), DeLong
patent: 5240870 (1993-08-01), Bergemont

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