Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – On insulating substrate or layer
Reexamination Certificate
2001-03-29
2003-04-15
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
On insulating substrate or layer
C438S429000
Reexamination Certificate
active
06548364
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a CMOS integrated circuit and, more particularly, to a self-aligned SiGe HBT BiCMOS on a SOI substrate, and a method of fabricating the same.
BACKGROUND OF THE INVENTION
Conventional fabrication steps for manufacturing Silicon Germanium (SiGe) bipolar complementary metal oxide semiconductor (BiCMOS) devices include fabricating complementary metal oxide semiconductors (CMOS) and SiGe bipolar hetero-junction bipolar transistors (HBT) on a bulk silicon substrate. This process produces a very high performance HBT for analogue signal processing wherein the CMOS portion is used for digital signal processing and data storage. A problem with this state-of-the-art structure is that the bulk CMOS is relatively slow and consumes a relatively large amount of power. The fabrication process for the device is also complex.
By integrating SiGe HBT into silicon-on-insulator (SOI) substrates one can retain the performance of the SiGe HBT and the low power, high-speed properties of a SOI CMOS. Such devices, and processes of manufacturing the same, have been disclosed in U.S. patent application Ser. No. 09/649,380, filed on Aug. 28, 2000 and titled “Method of Fabricating High Performance SiGe HBT BiCMOS on SOI Substrate,” wherein the entire disclosure of said patent application is hereby incorporated by reference. In this patent application, however, the disclosed base/collector junction is not self-aligned. Accordingly, the speed of the device disclosed in the patent application is relatively slow.
SUMMARY OF THE INVENTION
The present invention provides a SiGe HBT BiCMOS on a SOI substrate, and a method of fabricating the same, including a self-aligned base/collector junction to optimize the speed of the HBT. The disclosed SiGe BiCMOS/SOI device has a higher performance than a SiGe BiCMOS device on a bulk Silicon substrate. The disclosed device, and method of fabricating the same, also retains the high performance of a SiGe HBT and the low power, high-speed properties of a SOI CMOS. In addition, the disclosed method of fabricating a self-aligned base/collector junction provides a HBT transistor having an improved frequency response.
Accordingly, an object of the invention is to provide a SiGe HBT BiCMOS on a SOI substrate that retains the high performance of a SiGe HBT and the low power, high-speed properties of a SOI CMOS.
Another object of the invention is to provide a SiGe HBT BiCMOS on a SOI substrate including a self-aligned base/collector junction.
A further object of the invention is to provide a SiGe HBT BiCMOS on a SOI substrate having an improved frequency response.
REFERENCES:
patent: 5614425 (1997-03-01), Kimura et al.
patent: 5777347 (1998-07-01), Bartelink
patent: 6180466 (2001-01-01), Ibok
Article entitled, “Scaling Issues and Ge Profile Optimization in Advanced UHV/CVD SiGe HBT's”, by Richey et al., published in IEEE Transactions on Electron Devices, vol. 44, No. 3, March 1997, pp 431-439.
Article entitled, “Drift Hole Mobility in Strained and Unstrained Doped Si1-xGexAlloys”, by Manku et al., published in IEEE Transactions on Electron Devices, vol. 40, No. 11, Nov. 1993, pp 1990-1996.
Article entitled, “Optimization of SiGe HBT's for Operation at High Current Densities”, by Joseph et al., published in IEEE Transactions on Electron Devices, vol. 46, No. 7, Jul. 1999, pp. 1347-1354.
Article entitled, “Si/SiGe Epitaxial-Base Transistors-Part I: Materials, Physics, and Circuits”, by Harame et al., published in IEEE Transactions on Electron Devices, vol. 42, No. 3, Mar. 1995, pp 455-467.
Article entitled, “Current Gain Rolloff in Graded-Base SiGe Heterojunction Bipolar Transistors”, by Crabbe et al., published in IEEE Electron Devices Letters, Bol. 14, No. 4, Apr. 1993, pp 193-195.
Article entitled, “The Effect of Base-Emitter Spacers and Strain-Dependent Desities of States in Si/Si1-xGex/Si Heterojunction Bipolar Transistors”, by Prinz et al., published in 1989 IEDM 89-639-642 (27.1.1-27.1.4).
Dang Phuc T.
Krieger Scott C.
Nelms David
Rabdau Matthew D.
Ripma David C.
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