Self-aligned process for fabricating small DMOS cells

Details Self-aligned process for fabricating small DMOS cells Self-aligned process for fabricating small DMOS cells

1987-02-26

1988-09-27

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 29, 437 56, 437150, 437158, 357 234, H01L 21425, H01L 2978

Patent

active

047741988

ABSTRACT:
An improved fabrication process for vertical DMOS cells contemplates the prior definition of the gate areas by placing a polycrystalline silicon gate electrode and utilizing the gate electrode itself as a mask for implanting and diffusing the body regions, while forming the short region is carried out using self-alignment techniques which permit an easy control of the lateral extention of the region itself. A noncritical mask defines the zone where the short circuiting contact between the source electrode and the source and body regions in the middle of the DMOS cell will be made, also allowing the forming the source region. Opening of the relative contact is also effected by a self alignment technique, further simplifying the process.

REFERENCES:
patent: 4443931 (1984-04-01), Baliga et al.
patent: 4466176 (1984-08-01), Temple
patent: 4618872 (1986-10-01), Baliga
patent: 4630084 (1986-12-01), Tihanyi
patent: 4661838 (1987-04-01), Wildi et al.
patent: 4717940 (1988-01-01), Shinohe et al.
"The Optimization of ON-Resistance in Vertical DMOS Power Devices with Linear and Hexagonal Surface Geometries", by Kenneth Board, et al., appeared on IEEE Transactions on Electron Devices, vol. ED. 31, No. 1, Jan. 1984.
"Les Limites de la resistance a L'etat passant des DMOS de puissance" by Pierre Aloisi of Motorola of Toulouse-France.

Affiliated with

Also associated with

Rating

Self-aligned process for fabricating small DMOS cells does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Self-aligned process for fabricating small DMOS cells, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Self-aligned process for fabricating small DMOS cells will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2397813