Self-aligned polysilicon base contact in a bipolar junction tran

Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – With specified electrode means

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

257592, 257900, H01L 27082, H01L 27102, H01L 27088

Patent

active

055811140

ABSTRACT:
A bipolar transistor in accordance with the invention includes a polysilicon base contact (607A) which is self-aligned with a polysilicon emitter (303). The polysilicon emitter is formed from a first polysilicon layer overlying an intrinsic base region (502) in a substrate (201). An extrinsic base (504) in the substrate is in contact with the intrinsic base and is self-aligned with a spacer (406) adjacent to the emitter. The polysilicon base contact is formed from a second polysilicon layer (407) in contact with the extrinsic base and overlying the emitter. A second sidewall spacer (508) is formed on the second polysilicon layer on step caused by the emitter. A protective layer (509, 510) formed on portions of the second polysilicon layer protects the base contact when the second spacer and the underlying portion of the second polysilicon layer are removed. The separation between the polysilicon base contact and the polysilicon emitter is controlled by the thickness the second polysilicon layer and the thickness of the spacers so that the base contact is self-aligned with a fixed separation from the emitter. Layer and spacer thicknesses define separation between the emitter and the base contact and permit sub-micron active regions in the substrate.

REFERENCES:
patent: 4188707 (1980-02-01), Asano et al.
patent: 4577392 (1986-03-01), Peterson
patent: 4625391 (1986-12-01), Sasaki
patent: 4697333 (1987-10-01), Nakahara
patent: 4753709 (1988-06-01), Welch et al.
patent: 4971922 (1990-11-01), Watabe et al.
patent: 4980738 (1990-12-01), Welch et al.
patent: 4980739 (1990-12-01), Favreau
patent: 5200352 (1993-04-01), Pfiester
patent: 5254490 (1993-10-01), Kondo
patent: 5256586 (1993-10-01), Choi et al.
patent: 5320974 (1994-06-01), Hori et al.
Yamaguchi, et al., "0.5-.mu.m Bipolar Technology Using a New Base Formation Method: SST1C," IEEE 1993 Bipolar Circuits and Technology Meeting 4.2, 1993, pp. 63-66.
Iranmanesh, et al., "A 0.8-.mu.m Advanced single-Poly BiCMOS Technology for High-Density and High-Performance Applications," IEEE Journal of Solid-State Circuits, vol. 26, No. 3, Mar., 1991, pp. 422-426.
Yamaguchi, et al., "Process Integration and Device Performance of a Submicrometer BiCMOS with 16-GHzf.sub.t Double Poly-Bipolar Devices," IEEE Transactions on Electron Devices, vol. 36, No. 5, May, 1989, pp. 890-896.
Chiu, et al., "Non-overlapping Super Self-Aligned BiCMOS with 87ps Low Power ECL," IEDM, 1988, pp. 752-755.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Self-aligned polysilicon base contact in a bipolar junction tran does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Self-aligned polysilicon base contact in a bipolar junction tran, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Self-aligned polysilicon base contact in a bipolar junction tran will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-787528

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.