Self-aligned polycide process that utilizes a planarized layer o

Details Self-aligned polycide process that utilizes a planarized layer o Self-aligned polycide process that utilizes a planarized layer o

1996-07-02

1997-11-04

Niebling, John

Fishing, trapping, and vermin destroying

437192, 437193, 437195, H01L 2144

Patent

active

056839413

ABSTRACT:
The process for forming a layer of metal silicide over polysilicon structures, such as gates and interconnect lines, is simplified by forming a layer of insulation material over the polysilicon structures, removing the layer of insulation material until the layer of insulation material is substantially planar and the thickness of the insulation material over the polysilicon structures is within a predetermined thickness range, etching the planarized layer of insulation material until portions of the polysilicon structures are exposed, depositing a layer of metal over the resulting structure, and then reacting the metal layer with the polysilicon structures to form the layer of metal silicide.

REFERENCES:
patent: 4774201 (1988-09-01), Woo et al.
patent: 4957881 (1990-09-01), Crotti
patent: 5177028 (1993-01-01), Manning
patent: 5268330 (1993-12-01), Givens et al.
patent: 5610083 (1997-03-01), Chan et al.

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