Semiconductor device manufacturing: process – Making passive device – Trench capacitor
Patent
1997-12-04
2000-02-15
Nguyen, Tuan H.
Semiconductor device manufacturing: process
Making passive device
Trench capacitor
438243, H01L 2120
Patent
active
060252448
ABSTRACT:
Methods of forming a self aligned layers using a polishing step are disclosed. In an exemplary embodiment, a first layer of a first material is formed over an existing layer such that the first layer substantially conforms to and reproduces the pattern of the existing layer, with high and low portions whose locations correspond to the locations of the high and low portions, respectively, of the existing layer. Contrary to the practices of the polishing-planarization art, the first layer is formed such that its low portions are below the height of the high portions of the existing layer. Next, a relatively thin polish-stop layer of a second material is formed over the first layer such that the polish-stop layer substantially conforms to and reproduces the pattern of the first layer. The layers are then polished to remove the portions of the first layer and polish-stop layer which lie above the plane of the low portions of the polish-stop layer, and to provide a substantially flat surface. The remainder of the polish-stop layer is removed by a chemical etch. The first the first layer is thereby self-aligned and directly abutting to the existing layer with a complementary pattern. The methods according to the present invention can achieve precise self-alignment of the layers over large area wafers.
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Beilin Solomon I.
Lee Michael G.
Fujitsu Limited
Nguyen Tuan H.
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