Self-aligned memory cells and method for forming

Details Self-aligned memory cells and method for forming Self-aligned memory cells and method for forming

2010-10-20

2011-11-29

Pert, Evan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Bulk effect device

Bulk effect switching in amorphous material

C257S004000, C257S005000, C257SE31029, C365S148000, C438S131000

Reexamination Certificate

active

08067761

ABSTRACT:
The invention provides a memory cell based on variable resistance material memory element that includes an access device having a pillar structure that may also include a protective sidewall layer. The pillar access device selects and isolates the memory cell from other memory array cells and is adapted to both self-align any memory element formed thereon, and to deliver suitable programming current to the memory element. The pillar structure is formed from one or more access device layers stacked above a wordline and below the memory element. Optional resistive layers may be selectively formed within the pillar structure to minimize resistance in the access device layer and the memory element. The pillar access device may be a diode, transistor, Ovonic threshold switch or other device capable of regulating current flow to an overlying programmable memory material.

REFERENCES:
patent: 2007/0272913 (2007-11-01), Scheuerlein
patent: 2008/0237566 (2008-10-01), An et al.

Affiliated with

Also associated with

Rating

Self-aligned memory cells and method for forming does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Self-aligned memory cells and method for forming, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Self-aligned memory cells and method for forming will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4299082