Self-aligned manufacture of FET

Details Self-aligned manufacture of FET Self-aligned manufacture of FET

1983-09-13

1985-10-15

Hearn, Brian E.

Metal working

Method of mechanical manufacture

Assembling or joining

29571, 29576B, 29591, 148 15, 148187, 148DIG143, 148DIG83, 357 15, 357 22, 427 89, 427 90, 427 91, 156643, 156657, H01L 2948, H01L 2980, H01L 21308, H01L 21265

Patent

active

045465401

ABSTRACT:
This specification discloses a self-aligned manufacturing method of a Schottky gate FET. This method comprises the steps: forming a gate metallic layer on a semiconductor substrate and a mask overhanged on the metallic layer; ion-implanting impurity ions into the semiconductor substrate using the mask to form a source/drain region; depositing an insulator on the gate metallic layer side surface and the other surface below the mask; directionally etching said deposited insulator using the mask to expose the source/drain region; depositing a source/drain electrode using the mask; and removing the mask.

REFERENCES:
patent: 3906541 (1975-09-01), Goronkin
patent: 3994758 (1976-11-01), Ogawa et al.
patent: 4048712 (1977-09-01), Buiatti
patent: 4075652 (1978-02-01), Umebachi et al.
patent: 4389768 (1983-06-01), Fowler et al.
patent: 4393578 (1983-07-01), Cady et al.
patent: 4414737 (1983-11-01), Mendo et al.
patent: 4441931 (1984-04-01), Levin

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