Self-aligned isolated polysilicon plugged contacts

Details Self-aligned isolated polysilicon plugged contacts Self-aligned isolated polysilicon plugged contacts

1995-12-15

1997-12-23

Tsai, Jey

Fishing, trapping, and vermin destroying

437 60, 437195, H01L 2170

Patent

active

057007063

ABSTRACT:
A method for preparing an SRAM or DRAM structure on a substrate with an oppositely doped well therein, a field oxide region extending above and between the well and the substrate, first and second N-MOS transistors on the silicon substrate, and a P-MOS transistor on the silicon well. The source and drain regions of each of the P-MOS transistor and the first and second N-MOS transistors each have a polysilicon plug making contact therewith. Each polysilicon plug is isolated one from another by nitride spacers, has the same doping as the region with which it makes contact, and is self-aligned to the nitride spacers lining the passage of the polysilicon plugs to their respective contacts on either the silicon substrate or the silicon well. The self-aligned nature of the polysilicon plugs is due to the nitride spacers formed by etchant selectivities and photoresist masks.

REFERENCES:
patent: 5346844 (1994-09-01), Cho et al.
patent: 5387533 (1995-02-01), Kim
patent: 5565372 (1996-10-01), Kim

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