Fishing – trapping – and vermin destroying
Patent
1995-06-07
1997-07-22
Niebling, John
Fishing, trapping, and vermin destroying
437 44, 437931, H01L 21265, H01L 218234
Patent
active
056503431
ABSTRACT:
A process for forming shallow and/or lightly doped regions of impurity concentration adjacent to source/drain semiconductor regions in a semiconductor device. In one embodiment, the invention comprises: (a) providing a semiconductor of a first conductivity type having a first surface; (b) forming a gate structure on said first surface, the gate structure including a gate oxide layer and a polysilicon layer, and a ledge; and (c) implanting an impurity of a second conductivity type into the material and the ledge whereby a portion of the implant enters the substrate after passing through the ledge area overlying the edge of the gate and enters the substrate to a first depth below the surface, while a second portion of the implant does not pass through the ledge and enters the substrate to a depth below the surface of the substrate deeper than the first portion. In addition, an apparatus is disclosed, The apparatus may include a substrate having a surface; an insulating layer on the surface of the substrate, having a surface; a gate material layer on the surface of the insulating layer, the gate material layer having a surface; and an overhanging ledge comprised of an etchable material, having a thickness sufficient to permit at least a portion of a dopant implant to penetrate said overhanging ledge provided on the surface of the gate material layer.
REFERENCES:
patent: 4149904 (1979-04-01), Jones
patent: 4198250 (1980-04-01), Jecmen
patent: 4282648 (1981-08-01), Yu et al.
patent: 4366613 (1983-01-01), Ogura et al.
patent: 4430792 (1984-02-01), Temple
patent: 4590663 (1986-05-01), Haken
patent: 4728617 (1988-03-01), Woo et al.
patent: 5257095 (1993-10-01), Liu et al.
patent: 5272100 (1993-12-01), Satoh et al.
patent: 5508209 (1996-04-01), Zhang et al.
Design and Characteristics of the Lighly Doped Drain-Source (LDD) Insulated Gate Field-Effect Transistor, Ogura, et al., IEEE 1980, month unknown.
Alvis Roger
Luning Scott
Advanced Micro Devices , Inc.
Booth Richard A.
Niebling John
LandOfFree
Self-aligned implant energy modulation for shallow source drain does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Self-aligned implant energy modulation for shallow source drain , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Self-aligned implant energy modulation for shallow source drain will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1559659