Patent
1981-11-12
1984-08-28
James, Andrew J.
357 56, 357 59, 357 55, H01L 2980, H01L 2906, H01L 2904
Patent
active
044686820
ABSTRACT:
A gate-source structure and fabrication method for a surface-gate static induction transistor. The method requires only one masking step during fabrication, thereby eliminating or minimizing mask registration problems during fabrication of the devices. The method and the device are characterized by a two-step etching process which forms T-shaped gate windows in layers of polycrystalline silicon with different doping levels. The source region is formed during an annealing step from the layer with high doping level. During the annealing step, the gate regions are also formed from gate impurities implanted previously in the gate windows. The source structure and the gate structure are separated by a silicon dioxide protective layer.
REFERENCES:
patent: 3886580 (1975-05-01), Calviello
patent: 3905036 (1975-09-01), Goronkin
patent: 4146902 (1979-03-01), Tanimoto et al.
patent: 4196440 (1980-04-01), Anantha et al.
"Mitsubishi JFET Device Operates at Ultrahigh Frequency" Electronics, vol. 49, #15, Jul. 22, 1976, pp. 3E-4E.
GTE Laboratories Incorporated
James Andrew J.
Lamont John
Walrath Robert E.
Yeo J. Stephen
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