Self-aligned gate process for ICS based on modulation doped (Al,

Details Self-aligned gate process for ICS based on modulation doped (Al, Self-aligned gate process for ICS based on modulation doped (Al,

1984-11-05

1987-05-05

Ozaki, George T.

Metal working

Method of mechanical manufacture

Assembling or joining

29576B, 29591, 148 15, 148175, 148187, H01L 21205, H01L 2128

Patent

active

046620583

ABSTRACT:
A self-aligned gate process for integrated circuits based on modulation doped (Al, Ga)As/GaAs field effect transistors and in which the regions on each side of the metal silicide gate are heavily ion implanted to form the low resistance regions on either side of the gate.

REFERENCES:
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patent: 4330343 (1982-05-01), Christou et al.
patent: 4489480 (1984-12-01), Martin et al.
patent: 4503600 (1985-03-01), Nii et al.
patent: 4534103 (1985-08-01), Cho et al.
patent: 4545109 (1985-10-01), Reichert
T. Ishikawa, et al, "The Effect of Annealing on the Electrical Properties of Selectively Doped GaAs/N-AlGaAs Heterojunction Structures Grown by MBE", Japanese J. of Applied Physics, vol. 20, No. 11, Nov. 1981, pp. L814-L816.
Piotrowski et al., "Ohmic Contacts to III-IV Compound Semiconductors: A Review of Fabrication Techniques, Solid-State Electronics, vol. 26, No. 6, pp. 179-197, 1983, Pergamon Press, Ltd., Great Britain.
M. D. Feuer, et al, "High-Speed Low-Voltage Ring Oscillators Based on Selectively Doped Heterojunction Transistors", IEEE Electron Device Letters, vol. EDL-4, No. 9, pp. 306-307, 1983.

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