Self-aligned gate process

Details Self-aligned gate process Self-aligned gate process

1987-10-05

1988-12-20

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437184, 437176, 437229, 437912, 357 15, 357 22, 148DIG140, H01L 21265, H01L 2144, H01L 2148

Patent

active

047925310

ABSTRACT:
Disclosed is a process for producing a field effect transistor to provide a uniformity of spacing between the gate and drain as well as the gate and source.

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A. Geissberger et al., "Refractory Self-Aligned Gate Process for Monolithically Combined Microwave and Digital GaAs ICs", IEEE International Microwave Symposium Digest, 1987 MTT-S, pp. 665-668.

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