Self-aligned gate MESFET and the method of fabricating same

Details Self-aligned gate MESFET and the method of fabricating same Self-aligned gate MESFET and the method of fabricating same

1986-05-28

1987-12-01

Buczinski, Stephen C.

Metal treatment

Stock

Ferrous

357 15, 357 47, 357 88, 148DIG88, 437 22, H01L 2980, H01L 2936, H01L 2948

Patent

active

H00003905

ABSTRACT:
An improved performance MESFET device incorporating a structure fabricated utilized self-aligned gate process technology. The edges of the gate electrode formed are separated from the edges of the dopant regions implanted in the device substrate by a distance which optimizes device performance. In order to increase process yield, a layer of dielectric material is deposited on the substrate surface and then annealed to protect the gate electrode and both stabilize and planarize the substrate surface.

REFERENCES:
patent: 4222164 (1980-09-01), Triebwasser
patent: 4377030 (1983-03-01), Pettenpaul et al.
patent: 4389768 (1983-06-01), Fowler et al.
patent: 4396437 (1983-08-01), Kwok et al.
patent: 4426656 (1984-01-01), DiLorenzo et al.
patent: 4426767 (1984-01-01), Swanson et al.
patent: 4455738 (1984-06-01), Houston et al.
Fukuta et al, "4-GHz 15-W Power GaAs MESFET", pp. 559-563, IEEE Trans. on Elec. Devices vol. Ed-25, No. 6, Jun. 1978.
"Ti/W Silicide . . . VLSIS", Yokoyama et al, IEDM proceeding, pp. 80-83, 1981.

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