Self-aligned FET having etched ohmic contacts

Details Self-aligned FET having etched ohmic contacts Self-aligned FET having etched ohmic contacts

1995-12-13

1996-12-10

Fahmy, Wael

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Junction field effect transistor

257192, 257900, 257768, H01L 310328, H01L 2980, H01L 27088, H01L 2348

Patent

active

055833551

ABSTRACT:
A III-V semiconductor FET (10, 30, 40) having etched ohmic contacts (19, 20, 36, 37, 43, 44). A gate (16) of the FET (10, 30, 40) is formed in contact with a surface of a III-V substrate (11). An ohmic contact (19, 20, 36, 37, 43, 44) is created to include an alloy in contact with the surface of the substrate (11). The ohmic contact (19, 20, 36, 37, 43, 44) is formed to abut the gate structure (16, 17, 18) by covering a portion of the gate structure (16, 17, 18) and the substrate (11) with the ohmic contact (19, 20, 36, 37, 43, 44), then, removing portions of the ohmic contact from the gate structure (16, 17, 18) by etching. The ohmic contact (19, 20, 36, 37, 43, 44) is formed to be substantially devoid of gold.

REFERENCES:
patent: 5166096 (1992-11-01), Cote et al.

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