Self-aligned fabrication process for GaAs MESFET devices

Details Self-aligned fabrication process for GaAs MESFET devices Self-aligned fabrication process for GaAs MESFET devices

1986-05-06

1988-04-05

Hearn, Brian E.

Fishing, trapping, and vermin destroying

357 22I, 357 22J, 148DIG10, 148DIG140, 148DIG142, 437184, 437 41, 437177, 437192, 437931, 437912, H01L 21265, H01L 2144

Patent

active

047359137

ABSTRACT:
A self-aligned process for fabricating a GaAs semiconductor MESFET by depositing a layer of tungsten over the GaAs substrate, and ion implanting the substrate to provide channel doping. A gate composed of a conductive refractory material is deposited and delineated on the tungsten layer, and source and drain regions are formed in the substrate using the gate as a mask. The resulting device is annealed and contacts are formed to the source and drain regions, and to the gate.

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