Self aligned compact bipolar junction transistor layout and...

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Bipolar transistor

Reexamination Certificate

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C257S565000

Reexamination Certificate

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10418395

ABSTRACT:
The invention relates to a process of forming a bipolar junction transistor (BJT) that includes forming a topology over a substrate. Thereafter, a spacer is formed at the topology. A base layer is formed from epitaxial silicon above the spacer and at the topology. A leakage block structure is formed in the substrate by out-diffusion from the spacer. Thereafter a BJT is completed with the base layer and the spacer.

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patent: 0189135 (1986-07-01), None
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