Self-aligned bipolar transistor process

Details Self-aligned bipolar transistor process Self-aligned bipolar transistor process

1991-02-19

1991-11-12

Hearn, Brian E.

Coating processes

Electrical product produced

Integrated circuit, printed circuit, or circuit board

437 41, 437 46, 437150, 437156, 437160, 437162, 148DIG10, 148DIG11, 357 34, H01L 21265

Patent

active

050647741

ABSTRACT:
A fully self-aligned bipolar transistor having low emitter and base-resistances is formed in a semiconductor device. In one embodiment, a patterned masking layer is formed on an active device region of a semiconductor substrate. The patterned masking layer has an opening, within which a TiN sidewall spacer is formed. The active device region is selectively doped to form an intrinsic base, using the TiN sidewall spacer and patterned masking layer as a doping mask. An emitter electrode is formed on the intrinsic base by selective deposition of silicon. An extrinsic base is also formed in the active device region by doping. Self-aligned metal silicide contacts to the extrinsic base and the emitter electrode are formed and the TiN sidewall spacer is removed.

REFERENCES:
patent: 4546536 (1985-10-01), Anantha et al.
patent: 4824786 (1985-04-01), Chio et al.
patent: 4839305 (1989-06-01), Brighton
patent: 4908324 (1990-03-01), Nihira et al.
patent: 4960726 (1990-10-01), Lechaton et al.
patent: 4987089 (1991-01-01), Roberts
patent: 4988632 (1991-01-01), Pfiester

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