Self-aligned bipolar transistor

Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – With non-planar semiconductor surface

Reexamination Certificate

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Details

C257S584000, C257S587000, C257S588000, C257S592000, C438S309000, C438S312000, C438S317000

Reexamination Certificate

active

06873029

ABSTRACT:
A heterojunction bipolar transistor with self-aligned features having a self-aligned dielectric sidewall spacer disposed between base contact and emitter contact, and self-aligned base mesa aligned relative to self-aligned base contact. The base contact is self-aligned relative to the self-aligned dielectric sidewall spacer providing a predetermined base-to-emitter spacing thereby. The emitter may be an n-type, InP material; the base can be a p-type InGaAs material, possibly carbon-doped. The fabrication method includes forming a emitter electrode on an emitter layer; using the emitter contact as a mask, anisotropically etching the emitter exposing the base layer; forming a self-aligned dielectric sidewall spacer upon the emitter and base; self-alignedly depositing a self-aligned base electrode; using the self-aligned base electrode as a mask, anisotropically etching the base layer to expose the subcollector; and depositing a collector electrode on the subcollector layer.

REFERENCES:
patent: 5159423 (1992-10-01), Clark et al.
patent: 5525833 (1996-06-01), Jang
patent: 5946582 (1999-08-01), Bhat
patent: 6225181 (2001-05-01), Gregory
patent: 6239477 (2001-05-01), Johnson
patent: 6285044 (2001-09-01), Bhat
patent: 6337494 (2002-01-01), Ryum et al.
patent: 6399971 (2002-06-01), Shigematsu et al.

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