Oscillators – Automatic frequency stabilization using a phase or frequency... – Particular error voltage control
Patent
1998-03-16
1999-08-17
Grimm, Siegfried H.
Oscillators
Automatic frequency stabilization using a phase or frequency...
Particular error voltage control
331 1A, 331 25, H03L 7093
Patent
active
059399490
ABSTRACT:
A circuit and a method are provided for reducing power consumption in a phase-locked loop (PLL) by controlling how long the bias current for the charge pump is turned on. In such a circuit, a bias check circuit that indicates when the bias current has stabilized, and a self-adjusting control circuit including an internal counter are provided to measure how long the bias current takes to start up when the PLL is locked. Then the self-adjusting control circuit prevents the bias current from turning on until there is just enough time for it to stabilize before a charge pump event. A default control circuit is also provided to turn the bias current on for specified intervals when the PLL is out of lock.
REFERENCES:
patent: 5764108 (1998-06-01), Rose et al.
patent: 5783972 (1998-07-01), Nishikawa
patent: 5847614 (1998-12-01), Gilbert et al.
Olgaard Christian
Parameswaran Subramanian
Grimm Siegfried H.
National Semiconductor Corporation
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