Self-adjusting impedance matching driver

Details Self-adjusting impedance matching driver Self-adjusting impedance matching driver

1990-06-07

1992-07-28

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307591, 307594, 307603, 307605, 328 55, H03K 301, H03K 1716, H03K 5159

Patent

active

051343118

ABSTRACT:
A self-adjusting impedance matching driver for a digital circuit. The driver has both a pull-up gate to VDD and a pull-down gate to ground. An array of gates is provided in parallel with each of the pull-up gate and the pull-down gate, with any one or more of such gates being selectively enabled in response to circuit means that monitors the impedance match between the output of the driver and the network it drives. By enabling selectively such gates, any impedance mismatch can be minimized. The selective enablement may be done only at power up, and thereafter only if the driven network is changed substantially.

REFERENCES:
patent: 4845390 (1989-07-01), Chan

Affiliated with

Also associated with

Rating

Self-adjusting impedance matching driver does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Self-adjusting impedance matching driver, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Self-adjusting impedance matching driver will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1688609