Selectively plating conductive pillars in manufacturing a semico

Details Selectively plating conductive pillars in manufacturing a semico Selectively plating conductive pillars in manufacturing a semico

1990-06-01

1991-11-05

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437192, 437200, 437230, 148DIG26, H01L 21445

Patent

active

050631691

ABSTRACT:
Electrical connection to a device region (3,4) of a semiconductor device is formed by providing a semiconductor body (1) having adjacent one major surface (12) a device region (3,4) bounded by an insulating region (19a,19b,9), providing an activating layer (11) on the one major surface (12), applying a flowable material as a layer (13) of photosensitive resist, exposing and developing the resist to define an opening (14) over a contact area (12a) of the device region (3,4), and selectively plating electrically conductive material into the opening (14) to form a conductive pillar (15) in electrical contact with the contatct area (12a). The layer (13) of photosensitive resist is removed after formation of the conductive pillar (15) and a layer of insulating material is then provided to cover the conductive pillar (15) and the surface (12). The insulating layer is then etched to expose a top surface (15a) of the conductive pillar (15).

REFERENCES:
patent: 4087314 (1978-05-01), George et al.
patent: 4434544 (1984-03-01), Dohya et al.
patent: 4692349 (1987-09-01), Georgiou et al.
patent: 4822749 (1989-04-01), Flanner et al.
patent: 4963512 (1990-10-01), Iwanaga et al.

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