Selective refresh of single bit memory cells

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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36, 36, 36

Reexamination Certificate

active

07936610

ABSTRACT:
Methods and systems to selectively refresh a single bit per cell non-volatile memory cell to reduce memory cell errors. In an embodiment, a memory device scans its memory cells, performing a multi-level read on memory cells in a single bit per cell mode. Depending on the state sensed, the cell is refreshed to a correct state if necessary. In one embodiment, the memory scan is appended to a user erase operation, a flash block is swapped with another bock if the state sensed indicates charge gain, and a flash cell is programmed up if the state sensed indicates charge loss.

REFERENCES:
patent: 6396744 (2002-05-01), Wong
patent: 6522586 (2003-02-01), Wong
patent: 6662263 (2003-12-01), Wong
patent: 6731557 (2004-05-01), Beretta
patent: 7079422 (2006-07-01), Wong
patent: 7224604 (2007-05-01), Lasser
patent: 2009/0113115 (2009-04-01), Nazarian et al.
patent: 2009/0273969 (2009-11-01), Taylor et al.

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