Selective power to memory

Static information storage and retrieval – Powering

Patent

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Details

365228, 365229, G11C 514

Patent

active

056151624

ABSTRACT:
A memory cell array (12, 22) or selected blocks (32-36) thereof may be made inactive to reduce leakage current and power consumption. A switch (14, 26, 40-44, 116, 134, 139) is coupled between the memory cell array (12, 22, 96-100, 112, 132) or segmented memory blocks (32-36) and the power supply. The switch (14, 16, 40-44) are controlled to selectively connect the memory cell array (12, 22, 96-100, 112, 132) or blocks thereof (32-36) to the power supply according to the active, standby, or disabled operation states of the memory. The periphery circuitry (114) may also be powered separately from the memory cell array (112) to further reduce leakage currents and power consumption.

REFERENCES:
patent: 4937789 (1990-06-01), Matsubara
patent: 5140557 (1992-08-01), Yoshida
patent: 5262998 (1993-11-01), Mnich et al.
patent: 5365487 (1994-11-01), Patel et al.
patent: 5410713 (1995-04-01), White et al.

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