Selective performance enhancements for interconnect...

Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices

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C361S764000, C361S765000, C029S840000, C029S843000, C029S844000, C438S614000, C438S652000, C438S666000, C174S254000, C174S255000, C174S256000

Utility Patent

active

06169664

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to integrated semiconductor circuits and, more particularly, to the conducting leads or interconnect paths that carry electrical signals between electronic components.
2. Description of the Related Art
In fabricating the conducting paths electrically coupling components in an integrated circuit, two conflicting lo requirements must be accommodated. For conducting paths that distribute power signals or which provide the ground path, the metal stack forming the conducting paths should be thick to reduce the lead resistance and reduce the voltage drop along the conducting path. For conducting paths that distribute the clock and the data signals, the metal stack should be thin to reduce the parasitic capacitance. The width of the metal stacks is typically minimized to provide a maximum density of components for the integrated circuit.
In the past, the solution to provide conducting paths for both types of signals has been to provide a metal stack of a thickness which is a compromise between a desirable capacitance parameter and a desirable resistance parameter.
A need has therefore been felt for a technique which would provide two different thickness′ of conducting metal stacks to provide for a differentiation between the resistance parameter and the capacitance parameter for the selected conducting leads.
SUMMARY OF THE INVENTION
The aforementioned and other features are accomplished, according to the present invention, by forming metal stacks of a predetermined thickness. The selected metal stacks can then have conductive material added to selected stacks or can have conducting material removed from selected metal stacks. Added conducting material can be implemented, for example, by electrolytic deposition of conducting material on a stack, or by chemical or vapor deposition of conducting material on metal stacks not covered by protective material. Conducting material can be removed from selective stacks by, for example, etching material from metal stacks not covered by a protective material. In the removal process, the metal stacks can have a stop layer or can be comprised of two selectively etchable materials so that the removal of material can be controlled.
These and other features of the present invention will be understood upon the reading of the following description in conjunction with the Figures.


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