Selective operation of processing elements in a single instructi

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3642615, 3642283, 3642319, G06F 1516, G06F 1580

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active

050459953

ABSTRACT:
A plurality of processing elements independently operate in parallel on separate streams of data but in response to common instructions. In order to selectively and individually enable each processing element, a control register stage is provided for each. Each register may be controlled, as between its enabling and disabling states with respect to execution of a common instruction, by the results of a test performed by its associated processor in response to a prior instruction and by the complement of the test results. The system is especially adapted to support flow of control operators, such as IF/THEN constructs, IF/THEN/ELSE constructs and WHILE/DO loop constructs.

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