Selective offset adjustment of a track and hold circuit

Details Selective offset adjustment of a track and hold circuit Selective offset adjustment of a track and hold circuit

2006-11-14

2006-11-14

Jeanglaude, Jean Bruner (Department: 2819)

Coded data generation or conversion

Sample and hold

C341S172000

Reexamination Certificate

active

07136000

ABSTRACT:
A track/hold circuit with an offset adjustment that can be used to compensate for offset errors from other parts of the system containing the track/hold circuit. The offset adjustment may be provided by impressing a voltage at an electrode of a capacitor of the track/hold circuit during a hold mode and not impressing the voltage at the capacitor electrode during the track mode. The offset adjustment signal may be generated using an adjustable current source to propagate a current through a resistance that is coupled to the track/hold circuit output node via a capacitor of a voltage capacitive divider circuit during the hold mode. The offset introduced into the track/hold mode output signal can be independent of the voltage stored in the voltage capacitive divider circuit just prior to adding the offset adjustment signal.

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