Selective diffusion and etching method for isolation of integrat

Details Selective diffusion and etching method for isolation of integrat Selective diffusion and etching method for isolation of integrat

1977-02-03

1979-01-30

Rutledge, L. Dewayne

Metal treatment

Process of modifying or maintaining internal physical...

Chemical-heat removing or burning of metal

29576W, 29578, 29580, 148 15, 148187, 156647, 156648, 156649, 156662, 357 44, 357 46, 357 50, 357 52, 357 55, 357 92, H01L 21302, H01L 2176

Patent

active

041371097

ABSTRACT:
An integrated injection logic circuit, wherein the inverted, multi-collector transistor of each cell includes active base regions separated by dielectric isolation, and wherein a heavily-doped channel-stop layer is selectively located along the sidewalls of the isolation, to prevent collector-to-emitter surface inversion leakage. The isolated geometry substantially reduces parasitic capacitance between the substrate and the extrinsic base, thereby increasing the switching speed of the device.

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Berger et al., "Schottky Transistor Logic" ISSCC, 1975 (Feb.) Digest of Tech. Papers-Fam 14.6, pp. 172-173.
Altman, L., Ed. "Injection Logic's Range . . . is widest," Electronics, Jul. 10, 1975, pp. 86-89.
Berger et al., "Bipolar LSI Breakthrough, Part 2: . . . Limits" Electronics, Oct. 2, 1975, pp. 99-103.
Mulder et al., "High-Speed Integrated Injection Logic (I.sup.2 L)", IEEE J. of Solid-State Circuits, vol. SC-11, No. 3, Jun. 1976, pp. 379-385.

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