Selective deposition to improve selectivity and structures...

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays

Reexamination Certificate

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C257S368000, C257S506000

Reexamination Certificate

active

07358547

ABSTRACT:
Methods and associated apparatus of forming a microelectronic structure are described. Those methods comprise providing a substrate comprising a region of higher active area density comprising source and drain recesses and a region of lower active area density comprising source and drain recesses, wherein the region of lower active area density further comprises dummy recesses, and selectively depositing a silicon alloy layer in the source, drain and dummy recesses to enhance the selectivity and uniformity of the silicon alloy deposition.

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patent: 7109568 (2006-09-01), Kumagai et al.
patent: 2002/0190284 (2002-12-01), Murthy et al.
patent: 2003/0098479 (2003-05-01), Murthy et al.
patent: 2005/0093021 (2005-05-01), Ouyang et al.

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